Step 1
More model families
Bring up Qwen 2.5, Qwen 3, Phi-3.5 and Gemma 2 with real files and record what breaks.
Research that ships,in the open.
Our research goes into IMURUN: an inference engine, an agent and a research pipeline that run on your own machine. The code and the notes, including what does not work yet, are public.
Track 01 / 05 · Shipped
FISH inference engine.
FISH is a C++ engine that runs GGUF language models on ordinary computers. No llama.cpp underneath: every kernel, the tokenizer and the planner are ours.
Explore FISH engine- FISH inference engine: FISH is a C++ engine that runs GGUF language models on ordinary computers. No llama.cpp underneath: every kernel, the tokenizer and the planner are ours.
- GPU offload with Vulkan: One Vulkan compute backend so the same engine runs faster on NVIDIA, AMD and Intel graphics, on Windows and Linux first. The model file and the CPU path stay untouched.
- The agent loop: How the assistant calls tools by itself, what it is allowed to touch, and how you see and approve each step. All of it runs in one local process.
- Web research without an API key: How IMURUN looks things up on the web from your machine. What reaches the model is cleaned, ranked passages with numbered sources, not raw search snippets.
- On-device tuning: Off by default. Answers you like or correct can train a small LoRA adapter for that model, entirely on this machine, and only from turns you marked.
Five tracks.
One engine room.
KERNELSShipped
FISH inference engine
Our own C++ engine for running models locally
Explore →
VULKANIn progress
GPU offload with Vulkan
One portable backend for NVIDIA, AMD and Intel
Explore →
APPROVEShipped
The agent loop
Tools, permissions, approvals and sub-agents
Explore →
SOURCESShipped
Web research without an API key
Cleaned, ranked passages with numbered sources
Explore →
CONSENTExperimental
On-device tuning
A model that learns from your feedback, locally
Explore →What comes next.
Step 2
Faster prefill
Wider integer kernels on x86, and ARM NEON paths for Apple silicon and phones.
Step 3
Smaller memory
An f16 KV cache for longer context, and 2–3-bit quant kernels for 4 GB devices.
Step 4
Smarter residency
Load layers on a byte budget, so models larger than RAM stream predictably.
or just email support@imutechz.in, or open an issue on GitHub